![]() The auditing and security engineering abilities have allowed it to obtain the Evaluation Assurance Level (EAL) 6 rating by the National Security Agency (NSA). Its kernel design guarantees bounded computing times by eliminating features such as dynamic memory allocation. It is used in several military jets such as the B-2, F-16, F-22, and F-35, and the commercial aircraft Airbus A380. INTEGRITY-178B is the DO-178B–compliant version of INTEGRITY. INTEGRITY is supported by popular SSL/TLS libraries such as wolfSSL. Supported computer architectures include variants of: ARM, Blackfin, ColdFire, MIPS, PowerPC, XScale, and x86. INTEGRITY is POSIX-certified and intended for use in embedded systems of 32-bits or 64-bits. INTEGRITY and INTEGRITY-178B are real-time operating systems (RTOSes) produced and marketed by Green Hills Software. Wa_cq_url: "/content/www/us/en/docs/programmable/683609/21-3/display-items.Real-time operating system INTEGRITY DeveloperĪRM, XScale, Blackfin, ColdFire, MIPS, PowerPC, IA-32, x86-64 Wa_audience: "emtaudience:business/btssbusinesstechnologysolutionspecialist/developer/fpgaengineer", Wa_primarycontenttagging: "primarycontenttagging:intelfpgas/intelprogrammabledevices/intelagilexfpgasandsocfpgas/intelagilex7fpgasandsocfpgas", Wa_emtcontenttype: "emtcontenttype:designanddevelopmentreference/developerguide/developeruserguide", get_component_project_property 7.12.6.19. get_component_project_properties 7.12.6.18. get_component_parameter_property 7.12.6.15. get_component_interface_property 7.12.6.13. get_component_interface_port_property 7.12.6.11. get_component_interface_parameters 7.12.6.10. get_component_interface_parameter_value 7.12.6.9. get_component_interface_parameter_property 7.12.6.8. get_component_interface_assignments 7.12.6.7. ![]() get_component_interface_assignment 7.12.6.6. get_component_documentation_links 7.12.6.5. set_instantiation_interface_sysinfo_parameter_value 7.12.5.37. set_instantiation_interface_port_property 7.12.5.36. set_instantiation_interface_parameter_value 7.12.5.35. ![]() set_instantiation_interface_assignment_value 7.12.5.34. set_instantiation_hdl_file_property 7.12.5.33. set_instantiation_assignment_value 7.12.5.32. remove_instantiation_interface_port 7.12.5.30. remove_instantiation_interface 7.12.5.29. import_instantiation_interfaces 7.12.5.26. get_instantiation_interface_sysinfo_parameters 7.12.5.21. get_instantiation_interface_sysinfo_parameter_value 7.12.5.20. ![]() get_instantiation_interface_properties 7.12.5.19. get_instantiation_interface_property 7.12.5.18. get_instantiation_interface_ports 7.12.5.17. get_instantiation_interface_port_property 7.12.5.16. get_instantiation_interface_port_properties 7.12.5.15. get_instantiation_interface_parameters 7.12.5.14. get_instantiation_interface_parameter_value 7.12.5.13. get_instantiation_interface_assignments 7.12.5.12. get_instantiation_interface_assignment_value 7.12.5.11. get_instantiation_hdl_file_property 7.12.5.9. get_instantiation_hdl_file_properties 7.12.5.8. get_instantiation_assignment_value 7.12.5.6. copy_instance_interface_to_instantiation 7.12.5.5. add_instantiation_interface_port 7.12.5.4. is_instance_parameter_update_callback_enabled 7.12.4.29. get_instance_parameter_property 7.12.4.21. get_instance_interface_property 7.12.4.19. get_instance_interface_properties 7.12.4.18. get_instance_interface_port_property 7.12.4.16. get_instance_interface_parameters 7.12.4.15. get_instance_interface_parameter_value 7.12.4.14. get_instance_interface_parameter_property 7.12.4.13. get_instance_interface_assignments 7.12.4.12. get_instance_interface_assignment 7.12.4.11. get_instance_documentation_links 7.12.4.10. enable_instance_parameter_update_callback 7.12.4.7. Creating a System with Platform Designer Revision Historyħ.12.4.1. Comparing Platform Designer Systems and IP components 1.20. Saving and Archiving Platform Designer Systems 1.19. Managing Hierarchical Platform Designer Systems 1.18. Adding a System to an Intel® Quartus® Prime Project 1.17. Simulating Platform Designer Systems 1.16. Generating a Platform Designer System 1.15. Preserving a System Module, Interface, or Port for Debugging 1.14. Synchronizing System Component Information 1.12. Upgrading Outdated IP Components in Platform Designer 1.11. Configuring Platform Designer System Security 1.10. Specifying Signal and Interface Boundary Requirements 1.9. Creating or Opening a Platform Designer System 1.4. Platform Designer System Design Flow 1.3.
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